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ds04-27236-3e fujitsu semiconductor data sheet copyright?2002-2006 fujitsu limited all rights reserved assp for power supply applications (dc/dc converter for dsc/camcorder) 4-ch dc/dc converter ic with synchronous rectification mb39a110 description the mb39a110 is a 4-channel dc/dc conv erter ic using pulse width modulati on (pwm). this ic is ideal for up conversion, down conversion, and up/down conversion. this is built-in 4 ch in tssop-38p package and operates at 2 mhz max. each channel can be controlled, and soft-start. this is an ideal power supply for high-performanc e portable devices such as digital still cameras. this product is covered by us patent number 6,147,477. features ? supports for down-conversion and up /down zeta conversion (ch1 to ch3) supports for up-conversion and up/ down sepic conversion (ch4) for synchronous rectification (ch1, ch2) power supply voltage range : 2.5 v to 11 v reference voltage : 2.0 v 1 % error amplifier threshold voltage : 1.23 v 1 % high-frequency operation capability: 2 mhz (max) standby current : 0 a (typ) built-in soft-start circuit independent of loads built-in totem-pole type output for mos fet short-circuit detection capability by external signal ( ? ins terminal) one type of package (tssop-38 pin : 1 type) applications digital still camera(dsc) digital video camera(dvc) surveillance camera etc.
mb39a110 2 pin assignment (top view) (fpt-38p-m03) cs2 ? ine2 fb2 dtc2 vcc ctl ctl1 ctl2 ctl3 ctl4 vref rt ct gnd c scp dtc3 fb3 ? ine3 cs3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 cs1 ? ine1 fb1 dtc1 vcco- p out1-1 out1-2 out2-1 out2-2 gndo1 gndo2 out3 out4 vcco- n ? ins dtc4 fb4 ? ine4 cs4
mb39a110 3 pin description (continued) block pin no. symbol i/o descriptions ch1 35 dtc1 i dead time control terminal 36 fb1 o error amplifier output terminal 37 ? ine1 i error amplifier inverted input terminal 38 cs1 ? soft-start setting capacitor connection terminal 33 out1-1 o p-ch drive output block ground terminal (external main side fet gate driving) 32 out1-2 o n-ch drive output block ground terminal (external synchronous rectific ation side fet gate driving) ch2 4 dtc2 i dead time control terminal 3 fb2 o error amplifier output terminal 2 ? ine2 i error amplifier inverted input terminal 1cs2 ? soft-start setting capacitor connection terminal 31 out2-1 o p-ch drive output block ground terminal (external main side fet gate driving) 30 out2-2 o n-ch drive output block ground terminal (external synchronous rectific ation side fet gate driving) ch3 16 dtc3 i dead time control terminal 17 fb3 o error amplifier output terminal 18 ? ine3 i error amplifier inverted input terminal 19 cs3 ? soft-start setting capacitor connection terminal 27 out3 o p-ch drive output terminal ch4 23 dtc4 i dead time control terminal 22 fb4 o error amplifier output terminal 21 ? ine4 i error amplifier inverted input terminal 20 cs4 ? soft-start setting capacitor connection terminal 26 out4 o n-ch drive output terminal osc 13 ct ? triangular wave frequency setting capacitor connection terminal 12 rt ? triangular wave frequency setting resistor connection terminal
mb39a110 4 (continued) block pin no. symbol i/o descriptions control 6 ctl i power supply control terminal 7 ctl1 i control terminal 8 ctl2 i control terminal 9 ctl3 i control terminal 10 ctl4 i control terminal 15 cscp ? short-circuit detection circuit capacitor connection terminal 24 ? ins i short-circuit detection comparator inverted input terminal power 34 vcco-p ? p-ch drive output block power supply terminal 25 vcco-n ? n-ch drive output block power supply terminal 5vcc ? power supply terminal 11 vref o reference voltage output terminal 29 gndo1 ? drive output block ground terminal 28 gndo2 ? drive output block ground terminal 14 gnd ? ground terminal
mb39a110 5 block diagram vcco-p out2-1 out3 gndo1 vcc ctl ? ine1 cs1 fb1 dtc1 ? ine2 cs2 fb2 dtc2 ? ine3 cs3 fb3 dtc3 ? ine4 cs4 ? ins cscp fb4 dtc4 vref p-ch ch1 ch2 ch3 ch4 pwm comp.1 1.23 v ? + + ? + + i o = 300 ma at vcco = 7 v p-ch ? + + ? + + p-ch drive3 ? + + ? + + vref n-ch scp comp. drive4 scp osc ch ctl uvlo rt ct vref 2.0 v vref vr power on/off ctl bias gnd 1 v 0.9 v 0.4 v ? + + ? + ? + + 37 38 36 35 2 1 3 4 18 19 17 16 21 20 22 23 24 15 ctl1 7 ctl2 8 ctl3 9 ctl4 10 12 13 11 14 6 5 29 out4 26 27 31 34 out1-1 33 vref 1.23 v vref 1.23 v vref 1.23 v n-ch n-ch pwm comp.2 pwm comp.3 pwm comp.4 gndo2 28 out2-2 30 vcco-n 25 out1-2 32 1 a 1 a 1 a 100 k ? 1 a i o = 300 ma at vcco = 7 v i o = 300 ma at vcco = 7 v i o = 300 ma at vcco = 7 v i o = 300 ma at vcco = 7 v i o = 300 ma at vcco = 7 v dead time dead time (td = 50 ns) dead time (td = 50 ns) dead time error amp1 error amp2 error amp3 error amp4 drive1-1 drive2-1 drive1-2 drive2-2 l priority l priority l priority l priority threshold voltage (1.23 v 1 % ) threshold voltage (1.23 v 1 % ) threshold voltage (1.23 v 1 % ) l priority threshold voltage (1.23 v 1 % ) l priority h : release uvlo h : scp l priority l priority erroramp power supply scpcomp. power supply erroramp reference 1.23 v short detection signal (l: at short)
mb39a110 6 absolute maximum ratings * : the packages are mounted on the epoxy board (10 cm 10 cm). warning: semiconductor devices can be permanently dam aged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. recommended operating conditions warning: the recommended operating conditions are require d in order to ensure the normal operation of the semiconductor device. all of the device?s electric al characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating cond ition ranges. operation outside these ranges may adversely affect re liability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol condition rating unit min max power supply voltage v cc vcc, vcco terminal ? 12 v output current i o out1 to out4 terminal ? 20 ma peak output current i op out1 to out4 terminal, duty 5 % (t = 1 / f osc duty) ? 400 ma power dissipation p d ta + 25 c ? 1680* mw storage temperature t stg ?? 55 + 125 c parameter symbol condition value unit min typ max power supply voltage v cc vcc, vcco terminal 2.5 7 11 v reference voltage output current i ref vref terminal ? 1 ? 0ma input voltage v ine ? ine1 to ? ine4 terminal 0 ? v cc ? 0.9 v ? ins terminal 0 ? v ref v v dtc dtc1 to dtc4 terminal 0 ? v ref v control input voltage v ctl ctl terminal 0 ? 11 v output current i o out1 to out4 terminal ? 15 ?+ 15 ma oscillation frequency f osc ? 0.2 1.02 2.0 khz timing capacitor c t ? 27 100 680 pf timing resistor r t ? 3.0 6.8 39 k ? soft-start capacitor c s cs1 to cs4 terminal ? 0.1 1.0 f short-circuit detection capacitor c scp ?? 0.1 1.0 f reference voltage output capacitor c ref ?? 0.1 1.0 f operating ambient temperature ta ?? 30 + 25 + 85 c
mb39a110 7 electrical characteristics (vcc = vcco = 7 v, ta = + 25 c) * : standard design value (continued) parameter sym- bol pin no conditions value unit min typ max 1. reference voltage block [vref] output voltage v ref1 11 vref = 0 ma 1.98 2.00 2.02 v v ref2 11 v cc = 2.5 v to 11 v 1.975 2.000 2.025 v v ref3 11 vref = 0 ma to ? 1 ma 1.975 2.000 2.025 v input stability line 11 v cc = 2.5 v to 11 v ? 2* ? mv load stability load 11 vref = 0 ma to ? 1 ma ? 2* ? mv temperature stability ? v ref /v ref 11 ta = 0 c to + 85 c ? 0.20* ?% output current at short-circuit i os 11 vref = 0 v ?? 300* ? ma 2. under voltage lockout protection circuit block [uvlo] threshold voltage v th 33 v cc = 1.7 1.8 1.9 v hysteresis width v h 33 ? 0.05 0.1 ? v reset voltage v rst 33 vref = 1.5 1.7 1.85 v 3. short-circuit detection block [scp] threshold voltage v th 15 ? 0.65 0.70 0.75 v input source current i cscp 15 ?? 1.4 ? 1.0 ? 0.6 a 4. triangular wave oscillator block [osc] oscillation frequency f osc1 26, 27, 30 to 33 c t = 100 pf, r t = 6.8 k ? 0.97 1.02 1.07 mhz f osc2 26, 27, 30 to 33 c t = 100 pf, r t = 6.8 k ? , v cc = 2.5 v to 11 v 0.964 1.02 1.076 mhz frequency input stability ? f osc / f osc 26, 27, 30 to 33 c t = 100 pf, r t = 6.8 k ? , v cc = 2.5 v to 11 v ? 1.0* ?% frequency temperature stability ? f osc / f osc 26, 27, 30 to 33 c t = 100 pf, r t = 6.8 k ? , ta = 0 c to + 85 c ? 1.0* ?% 5. soft- start block [cs1 to cs4] charge current i cs 1, 19, 20, 38 cs1 to cs4 = 0 v ? 1.4 ? 1.0 ? 0.6 a
mb39a110 8 (vcc = vcco = 7 v, ta = + 25 c) *: standard design value (continued) parameter sym- bol pin no conditions value unit min typ max 6. error amplifier block [error amp1 to error amp4] threshold voltage v th1 2, 18, 21, 37 v cc = 2.5 v to 11 v, ta = + 25 c 1.217 1.230 1.243 v v th2 2, 18, 21, 37 v cc = 2.5 v to 11 v, ta = 0 c to + 85 c 1.215 1.230 1.245 v temperature stability ? v th / v th 2, 18, 21, 37 ta = 0 c to + 85 c ? 0.1* ?% input bias current b 2, 18, 21, 37 ? ine1 to ? ine4 = 0 v ? 120 ? 30 ? na voltage gain a v 3, 17, 22, 36 dc ? 100* ? db frequency bandwidth bw 3, 17, 22, 36 a v = 0 db ? 1.4* ? mhz output voltage v oh 3, 17, 22, 36 ? 1.7 1.9 ? v v ol 3, 17, 22, 36 ?? 40 200 mv output source current i source 3, 17, 22, 36 fb1 to fb4 = 0.65 v ?? 2 ? 1ma output sink current i sink 3, 17, 22, 36 fb1 to fb4 = 0.65 v 150 200 ? a 7. pwm comparator block [pwm comp.1 to pwm comp.4] threshold voltage v t0 26, 27, 30 to 33 duty cycle = 0 % 0.3 0.4 ? v v t100 26, 27, 30 to 33 duty cycle = 100 % 0.85 0.90 0.95 v input current i dtc 4, 16, 23, 35 dtc = 0.4 v ? 2.0 ? 0.6 ? a 8. output block [drive1 to drive4] output source current i source 26, 27, 30 to 33 duty 5 % (t = 1 / f osc duty) , out1 to out4 = 0 v ?? 300* ? ma output sink current i sink 26, 27, 30 to 33 duty 5 % (t = 1 / f osc duty) , out1 to out4 = 7 v ? 300* ? ma output on resistor r oh 26, 27, 30 to 33 out1 to out4 = ? 15 ma ? 914 ? r ol 26, 27, 30 to 33 out1 to out4 = 15 ma ? 914 ? dead time t d1 30 to 33 out2 ? out1 ? 50* ? ns t d2 30 to 33 out1 ? out2 ? 50* ? ns 9. short-circuit detection comparator block [scp comp.] threshold voltage v th 33 ? 0.97 1.00 1.03 v input bias current i b 24 ? ins = 0 v ? 25 ? 20 ? 17 a
mb39a110 9 (continued) (vcc = vcco = 7 v, ta = + 25 c) *: standard design value parameter sym- bol pin no conditions value unit min typ max 10. control block [ctl, chctl] output on conditions v ih 6, 7 to 10 ctl, ctl1 to ctl4 2 ? 11 v output off conditions v il 6, 7 to 10 ctl, ctl1 to ctl4 0 ? 0.8 v input current i ctlh 6, 7 to 10 ctl, ctl1 to ctl4 = 3 v ? 30 60 a i ctll 6, 7 to 10 ctl, ctl1 to ctl4 = 0 v ?? 1 a 11. general standby current i ccs 5 ctl, ctl1 to ctl4 = 0 v ? 02 a i ccso 25, 34 ctl = 0 v ? 01 a power supply current i cc 5ctl = 3 v ? 34.5ma
mb39a110 10 typical characteristics (continued) ta = + 25 c ctl = 3 v vref = 0 ma 5 4 3 2 1 0 02468101 2 power supply current i cc (ma) reference voltage v ref (v) power supply current vs. power supply voltage reference voltage vs. power supply voltage power supply voltage v cc (v) power supply voltage v cc (v) reference voltage vs. ctl terminal voltage reference voltage v ref (v) ambient temperature ta ( c) reference voltage v ref (v) reference voltage vs. ambient temperature ctl terminal voltage v ctl (v) ctl terminal current i ctl ( a) ctl terminal current vs. ctl terminal voltage ctl terminal voltage v ctl (v) ta = + 25 c ctl = 3 v 5 4 3 2 1 0 02468101 2 vcc = 7 v ctl = 3 v vref = 0 ma 2 .05 2 .04 2 .03 2 .02 2 .01 2 .00 1 .99 1 .98 1 .97 1 .96 1 .95 ? 40 ? 20 0 + 20 + 40 + 60 + 80 + 10 0 ta = + 25 c vcc = 7 v vref = 0 ma ctl = 3 v 5 4 3 2 1 0 02468101 2 ta = + 25 c vcc = 7 v 2 00 1 80 1 60 1 40 1 20 1 00 80 60 40 20 0 02468101 2
mb39a110 11 (continued) ta = + 25 c vcc = 7 v ctl = 3 v c t = 27 pf 1 0000 1000 100 10 c t = 100 pf c t = 230 pf c t = 680 pf 1 10 100 100 0 ta = + 25 c vcc = 7 v ctl = 3 v r t = 3 k ? r t = 6.8 k ? r t = 15 k ? r t = 39 k ? 1 0000 1000 100 10 10 100 1000 1000 0 ta = + 25 c vcc = 7 v ctl = 3 v r t = 6.8 k ? 1 .20 1 .10 1 .00 0 .90 0 .80 0 .70 0 .60 0 .50 0 .40 0 .30 0 .20 0 400 800 1200 1600 2000 vcc = 7 v ctl = 3 v r t = 6.8 k ? c t = 100 pf 1 .20 1 .10 1 .00 0 .90 0 .80 0 .70 0 .60 0 .50 0 .40 0 .30 0 .20 ? 40 ? 20 0 + 20 + 40 + 60 + 80 + 10 0 vcc = 7 v ctl = 3 v r t = 6.8 k ? c t = 100 pf 1 100 1 080 1 060 1 040 1 020 1 000 980 960 940 920 900 ? 40 ? 20 0 + 20 + 40 + 60 + 80 + 10 0 triangular wave upper and lower limit voltage vs. ambient temperature triangular wave upper and lower limit voltage v ct (v) ambient temperature ta ( c) triangular wave oscillation frequency vs. timing resistor triangular wave oscillation frequency f osc (khz) timing resistor r t (k ? ) triangular wave oscillation frequency vs. timing capacitor triangular wave oscillation frequency f osc (khz) timing capacitor c t (pf) triangular wave oscillation frequency vs. ambient temperature triangular wave oscillation frequency f osc (khz) ambient temperature ta ( c) triangular wave upper and lower limit voltage v ct (v) triangular wave upper and lower limit voltage vs. triangular wave oscillation frequency triangular wave oscillation frequency f osc (khz) upper upper lower lower
mb39a110 12 (continued) ? + + + 37 38 36 1 f in 10 k ? 2.4 k ? 240 k ? ou t 2.46 v 10 k ? 1.5 v 1.23 v 40 30 20 10 0 ? 10 ? 20 ? 30 ? 40 180 90 0 ? 90 ? 180 1 k 10 k 100 k 1 m 10 m a v ta = + 25 c vcc = 7 v 2 000 1 800 1 600 1 400 1 200 1 000 800 600 400 200 0 1 680 ? 40 ? 20 0 + 20 + 40 + 60 + 80 + 10 0 error amplifier gain, phase vs. frequency gain a v (db) phase (deg) frequency f (hz) power dissipation vs. ambient temperature power dissipation p d (mw) ambient temperature ta ( c) error amp1 the same as other channels
mb39a110 13 function description 1. dc/dc converter functions (1) reference voltage block (vref) the reference voltage circuit generates a temperature- compensated reference voltage (2.0 v typ) from the voltage supplied from the power supply terminal (pin 5). the voltage is used as the reference voltage for the ic?s internal circuit. the reference voltage can supply a load current of up to 1 ma to an exter nal device through the vref terminal (pin 11). (2) triangular-wave oscillator block (osc) the triangular wave oscillator incorporates a timing ca pacitor and a timing resistor connected respectively to the ct terminal (pin 13) and rt terminal (pin 12) to generate triangular oscillation waveform amplitude of 0.4 v to 0.9 v. the triangular waveforms are input to the pwm comparator in the ic. (3) error amplifier block (error amp1 to error amp4) the error amplifier detects the dc/dc converter output voltage and outputs pwm control signals. in addition, an arbitrary loop gain can be set by connecting a feed back resistor and capacitor fr om the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. also, it is possible to prevent rush current at power s upply start-up by connecting a soft-start capacitor with the cs1 terminal (pin 38) to cs4 terminal (pin 20) which ar e the non-inverted input terminal for error amp. the use of error amp for soft-start detection makes it possible fo r a system to operate on a fixed soft-start time that is independent of the output lo ad on the dc/dc converter. (4) pwm comparator block (pwm comp.1 to pwm comp.4) the pwm comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. the output transistor turns on while the error amplifier output voltage and dtc voltage remain higher than the triangular wave voltage. (5) output block (drive1 to drive 4) the output block is in the totem pol e type, capable of driving an external p-ch mos fet (channel 1 and 2 main side and channel 3), and n-ch mos fet (channel 1 and 2 synchronous rectification side and channel 4).
mb39a110 14 2. channel control function the main or each channel is turned on and off depending on the voltage leve ls at the ctl terminal (pin 6), cs1 terminal (pin 38), cs2 terminal (pin 1), cs3 terminal (pin 19), and cs4 terminal (pin 20). channel on/off setting conditions * : undefined note : note that current over stand-by current flows into vcc terminal when the ctl terminal is in ?l? level and one of terminals between ctl1 and ctl4 is set to ?h? level. (refer to ? i/o equivalent circuit?.) 3. protective functions (1) timer-latch short-circuit protection circuit (scp, scp comp.) the short-circuit detection comparator (scp) detects th e output voltage level of each channel, and if any channel output voltage becomes the short-circui t detection voltage or less, the timer ci rcuits are actuated to start charging the external capacitor c scp connected to the cscp terminal (pin 15). when the capacitor (c scp ) voltage reaches about 0.7 v, the circuit is turned off the output transistor and sets the dead time to 100 %. in addition, the short-circuit detection fr om external input is capable by using ? ins terminal (pin 24) on short- circuit detection comparator (scp comp.) . to release the actuated protection circuit, either turn the power supply off and on again or set the ctl terminal (pin 6) to the ?l? level to lower the vref terminal (pin 11) voltage to 1.5 v (min) or less. (refer to ? setting time constant for timer-latch short-circuit protection circuit?.) (2) under voltage lockout protection circuit (uvlo) the transient state or a momentary decrease in supply vo ltage, which occurs when the power supply is turned on, may cause the ic to malfunction, resulting in br eakdown or degradation of the system. to prevent such malfunctions, under voltage lockout protection circuit detec ts a decrease in internal reference voltage with respect to the power supply voltage, turn off the output transistor, and set the dead time to 100% while holding the cscp terminal (pin 15) at the ?l? level. the circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit. protection circuit operating function table this table refers to output condition when protection circuit is operating. ctl ctl1 ctl2 ctl3 ctl4 power ch1 ch2 ch3 ch4 l ? * ? * ? * ? * off off off off off h llll on off off off off h h lll on on off off off h l h ll on off on off off h ll h l on off off on off h lll h on off off off on h h h h h on on on on on operating circuit out1-1 out1-2 out2-1 out2-2 out3 out4 short-circuit protection circuit h l h l h l under voltage lockout protection circuit h l h l h l
mb39a110 15 setting the output voltage setting the triangular oscillation frequency the triangular oscillation frequency is determined by the timing resistor (r t ) connected to the rt terminal (pin 12), and the timing capacitor (c t ) connected to the ct terminal (pin 13). triangular oscillation frequency : f osc ? + + v o r 1 r 2 ? inex csx error amp 1.23 v v o (v) = (r1 + r 2) 1.23 r2 x: each channel no. ? ch1 to ch4 f osc (khz) : = 693600 c t (pf) r t (k ? )
mb39a110 16 setting the soft-start time to prevent rush currents when the ic is turned on, you can set a soft-start by connecting soft-start capacitors (c s1 to c s4 ) to the cs1 terminal (pin 38) to the cs4 terminal (pin 20), respectively. setting each ctlx from ?l? to ?h ? switches to charge the external soft-start capacitors (c s1 to c s4 ) connected to the cs1 to cs4 terminals at 1 a. the error amplifier output (fb1 to fb4) is determine d by comparison between the lower one of the potentials at two non-inverted input terminals (1.23 v, cs termin al voltages) and the inverted input terminal voltage ( ? ine1 to ? ine4). the fb terminal voltage during the soft-start period (cs terminal voltage < 1.23 v) is therefore determined by comparison between the ? ine terminal and cs terminal voltages. the dc/dc converter output voltage rises in proportion to the cs terminal voltage as the soft-sta rt capacitor connected to the cs terminal is charged. the soft-start time is obtained from the following formula: soft-start time: ts (time to output 100%) ts (s) : = 1.23 c sx ( f) ? + + v o r 1 r 2 ? inex vref csx c sx fbx ctlx error am p chctl 1.23 v 1 a x: each channel no. l priority soft-start circuit
mb39a110 17 treatment without using cs terminal when not using the soft-start function, open the cs1 terminal (pin 38), the cs2 terminal (pin 1), the cs3 terminal (pin 19), the cs4 terminal (pin 20). 1 19 cs2 cs3 38 20 cs1 cs4 ?open? ?open? ?open? ?open? without setting soft-start time
mb39a110 18 setting time constant for timer-latch short-circuit protection circuit each channel uses the short-circuit detection compar ator (scp) to always compare the error amplifier s output level to the reference voltage. while dc/dc converter load conditions are stable on al l channels, the short-circuit detection comparator output remains at ?l? level, and the cscp terminal (pin 15) is held at ?l? level. if the load condition on a channel c hanges rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparat or on that channel goes to ?h? level. this causes the external short-circuit protection capacitor c scp connected to the cscp terminal to be charged at 1 a. short-circuit detection time : t cscp t cscp (s) : = 0.70 c scp ( f) when the capacitor c scp is charged to the threshold voltage (v th : = 0.70 v), the latch is set and the external fet is turned off (dead time is set to 100%). at this time, the latch i nput is closed and the cscp terminal (pin 15) is held at ?l? level. in addition, the short-circuit detection fr om external input is capable by using ? ins terminal (pin 24) on the short-circuit detection comparator (scp comp.). the short-circuit detection operation starts when ? ins terminal voltage is less than threshold voltage (v th : = 1 v). when the power supply is turn off and on again or vref terminal (pin 11) voltage is less than 1.5 v (min) by setting ctl terminal (pin 6) to ?l? level, the latch is released. + ? + v o r 1 r 2 ? inex cscp ctl vref sr fbx scp comp. uvlo latch 1.1 v ? + error amp 1.23 v 1 a 15 x: each channel no. to each channel drives timer-latch short-circuit protection circuit
mb39a110 19 treatment without using cscp terminal when not using the timer-latch short-circuit protection ci rcuit, connect the cscp terminal (pin 15) to gnd with the shortest distance. 14 15 gnd cscp treatment without using cscp terminal
mb39a110 20 setting the dead time when the device is set for step-up or inverted output based on the step-up or step-up/down zeta conversion, step-up/down sepic conversion or flyback conversion , the fb terminal voltage may reach and exceed the trian- gular wave voltage due to load fluctuat ion. if this case happens, the output tran sistor is fixed to a full-on state (on duty = 100 %). to prevent this, set the maximum duty of the output transistor. to set it, set the voltage at the dtc terminal by applying a resistive volta ge divider to the vref voltage as shown below. when the dtc terminal voltage is higher than the triangul ar wave voltage, the output transistor is turned on. the maximum duty calculation formula assuming that tr iangular wave amplitude 0.5 v and triangular wave lower voltage : = 0.4 v is given below. when the dtc terminal is not used, connect it directly to the vref terminal (pin 11) as shown below (when no dead time is set). = = duty (on) max = vdt ? 0.4 v 0.5 v 100 ( % ) , vdt = rb ra + rb vref 11 vref dtcx ra rb v dt x: each channel no. when using dtc to set dead time 11 vref dtcx x: each channel no. when no dead time is set
mb39a110 21 i/o equivalent circuit 5 14 + ? 11 1.23 v vre f v cc g nd 79 k ? 124 k ? c tl gnd 67 k ? 104 k ? 6 c tlx gnd 76 k ? 76 k ? r t gnd vref ( 2.0 v) 12 + ? 0.7 v cs x gnd vref ( 2.0 v) ct gnd vref ( 2.0 v) 13 ? inex csx gnd vcc vref (2.0 v) fb x 1.23 v csc p 2 k ? gnd vref ( 2.0 v) 15 dtcx gnd vcc f b1 to fb4 c t out1-x outx gndo1 v cco-p 34 29 gndo2 28 out2- x outx gndo1 vcco-n 25 gndo2 ? ins (1 v ) gnd vcc 100 k ? vref (2.0 v) 24 x: each channel no. ?? reference voltage block ?? ?? control block ?? ?? channel control block ?? ?? short-start block ?? ?? triangular wave oscillator block (rt) ?? ?? triangular wave oscillator block (ct) ?? ?? error amplifier block (ch1 to ch4) ?? ?? short-circuit detection comparator block ?? ?? pwm comparator block ?? ?? output block p-ch (ch1 to ch3) ?? ?? short-circuit detection block ?? ?? output block n-ch (ch1, ch2, ch4) ?? esd protection element esd protection element esd protection element
mb39a110 22 application example a b c d a b d c r24 0.2 k ? r25 9.1 k ? r26 20 k ? c20 0.15 f c19 0.1 f r27 1 k ? r9 3.3 k ? r10 22 k ? r11 15 k ? c10 0.15 f c11 0.1 f r12 1 k ? r14 3 k ? r15 43 k ? r16 15 k ? c16 0.15 f c15 0.1 f r17 1 k ? r18 12 k ? r22 33 k ? r23 20 k ? r13 6.8 k ? r19 100 k ? r20 10 k ? c17 0.15 f c18 0.1 f c14 2200 pf c13 100 pf c12 0.1 f c21 0.1 f r21 1 k ? c22 0.1 f c1 1 f c2 2.2 f c23 0.1 f q1 q2 l1 6.8 h 6.8 h 10 h d1 v o 1 (1.8 v ) i o 1 = 550 m a c3 1 f c4 2.2 f q3 q4 l2 d2 v o 2 (3.3 v ) i o 2 = 600 m a c5 1 f c7 1 f c6 2.2 f c8 2.2 f c9 2.2 f q5 q6 l3 d3 d4 d5 t1 v o 3 (5.0 v ) i o 3 = 250 m a v o 4-1 (15 v) i o 4-1 = 40 ma v o 4-2 ( ? 15 v ) i o 4-2 = ? 10 m a v in ( 5.5 v to 8.5 v) vcco-p out2-1 out3 gndo1 vcc ctl ? ine1 cs1 fb1 dtc1 ? ine2 cs2 fb2 dtc2 ? ine3 cs3 fb3 dtc3 ? ine4 cs4 ? ins cscp fb4 dtc4 ch1 ch2 ch3 ch4 rt ct vref gnd 37 38 36 35 2 1 3 4 18 19 17 16 21 20 22 23 24 15 ctl1 7 ctl2 8 ctl3 9 ctl4 10 12 13 11 14 6 5 29 out4 26 27 31 34 out1-1 33 gndo2 28 out2-2 30 vcco-n 25 out1-2 32 step- down step- down step- down trans- former short-circuit detection signal (l : at short-circuit)
mb39a110 23 parts list note : sanyo : sanyo electric co., ltd. tdk : tdk corporation sumida : sumida electric co., ltd. ssm : susumu co., ltd. component item specification vendor parts no. q1, q3, q5 q2, q4 q6 p-ch fet n-ch fet n-ch fet vds = ? 20 v, id = ? 1.0 a vds = 20 v, id = 1.8 a vds = 30 v, id = 1.4 a sanyo sanyo sanyo mch3307 mch3405 mch3408 d1 to d3 d4, d5 diode diode vf = 0.4 v (max) , if = 1 a vf = 0.55 v (max) , if = 0.5 a sanyo sanyo sbs004 sb05-05cp l1, l2 l3 inductor inductor 6.8 h 10 h 1.1 a, 47 m ? 0.94 a, 56 m ? tdk tdk rlf5018t- 6r8m1r1 rlf5018t- 100mr94 t1 transformer ?? sumida clq52 5388-t139 c1, c3, c5, c7 c2, c4, c6, c8 c9, c11 c10, c16, c17 c11, c12, c15 c13 c14 c18, c19 c20 c21 to c23 ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser 1 f 2.2 f 2.2 f 0.15 f 0.1 f 100 pf 2200 pf 0.1 f 0.15 f 0.1 f 25 v 25 v 25 v 16 v 50 v 50 v 50 v 50 v 16 v 50 v tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk c3216jb1e105k c3216jb1e225k c3216jb1e225k c1608jb1c154m c1608jb1h104k c1608ch1h101j c1608jb1h222k c1608jb1h104k c1608jb1c154m c1608jb1h104k r9 r10 r11, r16 r12, r17, r21 r13 r14 r15 r18 r19 r20 r22 r23, r26 r24 r25 r27 resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor 3.3 k ? 22 k ? 15 k ? 1 k ? 6.8 k ? 3 k ? 43 k ? 12 k ? 100 k ? 10 k ? 33 k ? 20 k ? 200 ? 9.1 k ? 1 k ? 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm rr0816p-332-d rr0816p-223-d rr0816p-153-d rr0816p-102-d rr0816p-682-d rr0816p-302-d rr0816p-433-d rr0816p-123-d rr0816p-104-d rr0816p-103-d rr0816p-333-d rr0816p-203-d rr0816p-201-d rr0816p-912-d rr0816p-102-d
mb39a110 24 reference data (continued) ta = + 25 c v o 1 = 1.8 v, 550 ma v o 2 = 3.3 v, 600 ma v o 3 = 5 v, 250 ma v o 4-1 = 15 v, 40 ma v o 4-2 = ? 15 v, ? 10 ma f osc = 1 mhz setting 1 00 95 90 85 80 75 70 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9 .0 ta = + 25 c v o 1 = 1.8 v, 550 ma v o 2 = 3.3 v, 600 ma v o 3 = 5 v, 250 ma v o 4-1 = 15 v, 40 ma v o 4-2 = ? 15 v, ? 10 ma f osc = 1 mhz setting 1 00 95 90 85 80 75 70 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9 .0 ch3 ch2 ch1 ch4 total efficiency ( % ) input voltage v in (v) total efficiency vs. input voltage note: only concerned ch is on. include external sw tr operating current. each ch efficiency ( % ) input voltage v in (v) each ch efficiency vs. input voltage
mb39a110 25 (continued) conversion efficiency ( % ) load current l o (ma) conversion efficiency vs. load current (ch4) conversion efficiency ( % ) load current i o (ma) conversion efficiency vs. load current (ch1, ch2, ch3) ta = + 25 c v in = 7.2 v 1 00 95 90 85 80 75 70 0 100 200 300 400 500 600 700 800 900 100 0 ch3 ch2 ch1 i o 2 120 ma: discontinuance mode note: only concerned ch is on. include external sw tr operating current. ta = + 25 c v in = 7.2 v 1 00 95 90 85 80 75 70 010203040506 0 ch4 i o 4 ? 1 30 ma: discontinuance mode notes : ? only feedback controlling output is get by using transformer channel. v o4-2 : i o = ? 10 ma fixed ? only concerned ch is on. include external sw tr operating current.
mb39a110 26 (continued) switching wave form o ut1-1 (v) out1-2 (v) ch1 10 5 0 10 5 0 vd (v) t ( s) v in = 7.2 v v o 1 = 1.8 v i o 1 = 550 m a 8 6 4 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 o ut2-1 (v) out2-2 (v) ch2 10 5 0 10 5 0 vd (v) t ( s) v in = 7.2 v v o 2 = 3.3 v i o 2 = 600 m a 8 6 4 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 o ut3 (v) ch3 10 5 0 vd (v) t ( s) v in = 7.2 v v o 3 = 5 v i o 3 = 250 m a 8 6 4 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
mb39a110 27 (continued) o ut4 (v) ch4 10 5 0 vd (v) t ( s) v in = 7.2 v v o 4-1 = 15 v i o 4-1 = 40 ma v o 4-2 = ? 15 v i o 4-1 = ? 10 m a 8 6 4 2 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
mb39a110 28 usage precautions printed circuit board ground lines should be set up with consideration for common impedance. take appropriate static electricity measures. ? containers for semiconductor materials should have anti -static protection or be made of conductive material. ? after mounting, printed circuit boards should be stored and shipped in conduc tive bags or containers. ? work platforms, tools, and in struments should be properly grounded. ? working personnel should be gr ounded with resistance of 250 k ? to 1 m ? between body and ground. do not apply negative voltages. ? the use of negative voltages below ? 0.3 v may create parasitic transistors on lsi lines, which can cause malfunction. ordering information ev board ordering information rohs compliance information of lead (pb) free version the lsi products of fujitsu with ?e1? are compliant with rohs directive , and has observed the standard of lead, cadmium, mercury, hexavalent chromium, polyb rominated biphenyls (pbb) , and polybrominated diphenyl ethers (pbde) . the product that conforms to this standard is added ?e1? at the end of the part number. marking format (lead free version) part number package remarks mb39a110pft- ??? e1 38-pin plastic tssop (fpt-38p-m03) lead free version ev board part no. ev board version no. remarks mb39a110evb board rev. 1.0 tssop-38p mb39a110 xxxx e1 xxx index lead free version
mb39a110 29 labeling sample (lead free version) 2006/03/01 assembled in japan g qc pass (3n) 1mb123456p-789-ge1 1000 (3n)2 1561190005 107210 1,000 pcs 0605 - z01a 1000 1/1 1561190005 mb123456p - 789 - ge1 mb123456p - 789 - ge1 mb123456p - 789 - ge1 pb lead free version lead-free mark jeita logo jedec logo
mb39a110 30 mb39a110pft- ??? e1 recommended conditions of moisture sensitivity level [temperature profile for fj standard ir reflow] (1) ir (infrared reflow) (2) manual soldering (partial heating method) conditions : temperature 400 c max times : 5 s max/pin item condition mounting method ir (infrared reflow) , m anual soldering (partial heating method) mounting times 2 times storage period before opening please use it within two years after manufacture. from opening to the 2nd reflow less than 8 days when the storage period after opening was exceeded please processes within 8 days after baking (125 c, 24h) storage conditions 5 c to 30 c, 70 % rh or less (the lowest possible humidity) 260 c (e) (d') (d) 255 c 170 c 190 c rt (b) (a) (c) to note : temperature : the top of the package body (a) temperature increase gradient : average 1 c/s to 4 c/s (b) preliminary heating : temperature 170 c to 190 c, 60 s to 180 s (c) temperature increase gradient : average 1 c/s to 4 c/s (d) actual heating : temperature 260 c max; 255 c or more, 10 s or less (d?) : temperature 230 c or more, 40 s or less or temperature 225 c or more, 60 s or less or temperature 220 c or more, 80 s or less (e) cooling : natural cooling or forced cooling h rank : 260 c max
mb39a110 31 package dimension 38 -pin pl as tic t ss op le a d pitch 0.50 mm p a ck a ge width p a ck a ge length 4.40 9.70 mm le a d s h a pe g u llwing s e a ling method pl as tic mold mo u nting height 1.10 mm max 38 -pin pl as tic t ss op (fpt- 38 p-m0 3 ) (fpt- 38 p-m0 3 ) c 2002 fujit s u limited f 38 00 3s c-1-1 0.127?.05 (.005?002) 9.70?.10(. 38 2?004) 4.40?.10 6.40?.10 (.252?004) (.17 3 ?004) 0.10(.004) 0.50(.020) 0.10?.10 (.004?004) (.024?004) 0.60?.10 0.25(.010) index 1.10(.04 3 ) 0.90?.05 (.0 3 5?002) 9.00(. 3 54) 0~ 8 ? max dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb39a110 f0608 fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any ot her right of fujitsu or any third party or does fujitsu warrant non-in fringement of any third-party?s intellectual property right or othe r right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremel y high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, ai rcraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon syst em), or (2) for use requiring extremely high reliability (i.e., su bmersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design m easures into your facility and equipment such as redundancy, fi re protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. edited business promotion dept.

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